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type package tle 4305 g pg-dso-8 voltage-current regulator tle 4305 data sheet 1 rev. 2.2, 2008-11-17 features ? wide supply voltage operation range wide ambient temperature operation range minimized external circuitry high voltage r egulation accuracy high current limit regulation accuracy low temperature drift independent volt age- current-loop compensation internal fixed amplification fully temperature compens ated current- and voltage ota (operational transconductance amplifier) smd package industrial type green product (rohs compliant) functional description the tle 4305 g is specifically designed to control the output voltage and the output current of a switch mode power supply. independent compensation ne tworks for the voltage- and for the current-loop can be realized by exte rnal circuitry. the device contains a high accuracy bandg ap reference voltage, two operational trans conductance amplifier (ota), an opto-coupler driver output stage and an high-voltage bias circuit. the device is based on infineons double is olated power line technology dopl which allows to produce high prec ision bipolar voltage regulato rs with breakd own voltages up to 45 v.
data sheet 2 rev. 2.2, 2008-11-17 tle 4305 figure 1 pin configuration (top view) table 1 pin definitions and functions pin no. symbol function 1s supply voltage; external blocking ca pacitor necessary (see figure 4 ). 2 vse voltage sense input; non inverting with respect to voltage compensation vco; internal comp ared with the high accuracy bandgap-reference (typ. 2.5 v). 3out output; npn emitter follower output with an internal series resistor of 1 k ? ; controlled by the potential of vco or cco; output voltage is internally clamped therefore the ou tput current is internally limited. 4cse current sense input 1; connected to an inte rnal voltage divider (reference to the inverting in put of the curre nt ota; see figure 7 ). 5gnd ground; reference potential unle ss otherwise specified. 6cco current compensation output; internal series resistor to the current-ota output (typ. 1 k ? ); amplification internal temperature compensated; current loop co mpensation can be done by an external capacitor to gnd. 7vco voltage compensation output; internal series resistor to the voltage-ota output (typ. 1 k ? ); amplification internal temperature compensated; voltage loop com pensation can be done by an external capacitor to gnd. 8cre current-ota reference input; current sense reference input; non inverting input of the current-ota. vse aep02887 1 2 3 4 8 7 6 5 cre out vco cco gnd cse s
tle 4305 data sheet 3 rev. 2.2, 2008-11-17 figure 2 block diagram aeb02879 c-ota control logic r i1 25 k r i2 2 k 1 k r vc 1 k v-ota biasing and bandgap- reference v ref tle 4305g vse cse gnd out vco v ref driver cre r cc 1 k cco s 1 2 4 8 7 3 6 5
data sheet 4 rev. 2.2, 2008-11-17 tle 4305 note: stresses above those lis ted here may cause permanen t damage to the device. exposure to absolute maximu m rating conditions for ex tended periods may affect device reliability. note: in the operating range, the functions gi ven in the circuit descr iption are fulfilled. table 2 absolute maximum ratings parameter symbol limit values unit remarks min. max. voltages supply voltage v s -0.3 45 v ? input voltages v vse ; v cse ; v cre -0.3 7 v ? output voltages v out ; v vco ; v cco -0.3 7 v ? currents output current i out -5 3 ma ? output current i vco ; i cco -0.5 0.5 ma ? esd-protection human body model v esd -1.5 1.5 kv according jedec jesd22-a114 temperatures junction temperature t j -40 150 c? storage temperature t stg -50 150 c? thermal resistances junction ambient r thj-a ?200k/w? table 3 operating range parameter symbol limit values unit remarks min. max. supply voltage v s 842v? junction temperature t j -40 150 c?
tle 4305 data sheet 5 rev. 2.2, 2008-11-17 table 4 electrical characteristics 8 v < v s < 42 v; -40 c < t j < 150 c; i out = 0 ma; all voltages with respect to ground; positive current defined flowing in to pin; unless ot herwise specified. parameter symbol limit values unit test condition min. typ. max. current consumption supply current i s ?11.5ma v s = 9 v; t j = 25 c supply current i s ??2ma v s = 9 v supply current i s ?1.52.5ma v s = 42 v; t j = 25 c supply current i s ??4ma v s = 42 v reference voltage (measurable at pin cse) voltage at pin cse v cse,ref 2.45 2.50 2.55 v t j = 25 c; i cse = 0 ma voltage at pin cse v cse,ref 2.425 ? 2.575 v i cse = 0 ma temperature coefficient ? v cse,ref -50 ? 50 ppm/k ? voltage-ota; pin vse and vco input voltage threshold v vse ? v ref ?v i vco = 0 ma; v vco = 2.5 v input offset voltage v vse,io -5 ? 5 mv i vco = 0 ma; v vco = 2.5 v transconductance g v ?1?ms g v = ? i vco / ? u vse output series resistor r vco ?2?k ? ? gain bandwidth product b v ?500?khz? input current i vse -1.0 -0.2 -0 a v vse = 0 v output current; source i vco -150 -60 -25 a v vse = 5 v; v vco = 2.5 v output current; sink i vco 25 60 150 a v vse = 0 v; v vco = 2.5 v
data sheet 6 rev. 2.2, 2008-11-17 tle 4305 current-ota; pin cse and cco input voltage threshold v cse -210 -200 -190 mv i cco = 0 ma; v cco = 2.5 v transconductance g c ?1?ms g c = ? i cco / ? u cse output series resistor r cco ?2?k ? ? gain bandwidth product b c ?500?khz? input current i cse -200 -100 -50 a v cse = 0 v output current; source i cco -150 -60 -25 a v cre = 2.5 v; v cse = 0 v; v cco = 2.5 v output current; sink i cco 25 60 150 a v cre = 0 v; v cse = 0 v; v cco = 2.5 v current reference input pin cre input current i cre -1.0 -0.2 -0 a v cse = 0 v; v cre = 0 v output pin out output voltage limit v out 345.5v v vse = 5 v; r out-gnd = 22 k ? output current; voltage loop controlled i out -8.5 -4 -2 ma 10 v < v s < 42 v; v vse = 5 v; v out = 0 v output current; voltage loop controlled i out -4.5 -2.0 -0.5 ma 8 v < v s < 10 v; v vse = 5 v; v out = 0 v table 4 electrical characteristics (cont?d) 8 v < v s < 42 v; -40 c < t j < 150 c; i out = 0 ma; all voltages with respect to ground; positive current defined flowing in to pin; unless ot herwise specified. parameter symbol limit values unit test condition min. typ. max.
tle 4305 data sheet 7 rev. 2.2, 2008-11-17 note: the listed characteristic s are ensured over the operat ing range of the integrated circuit. typical characteristics specify mean values expected over the production spread. if not otherwise specified, typical ch aracteristics apply at t a = 25 c and the given supply voltage. output current; current loop controlled i out -8.5 -4 -2 ma 10 v < v s < 42 v; v cse = 0 v; v cre = 5 v; v out = 0 v output current; current loop controlled i out -4.5 -2.0 -0.5 ma 8 v < v s < 10 v; v cse = 0 v; v cre = 5 v; v out = 0 v table 4 electrical characteristics (cont?d) 8 v < v s < 42 v; -40 c < t j < 150 c; i out = 0 ma; all voltages with respect to ground; positive current defined flowing in to pin; unless ot herwise specified. parameter symbol limit values unit test condition min. typ. max.
data sheet 8 rev. 2.2, 2008-11-17 tle 4305 application information the tle 4305 is a voltage and current regulator for switch mode power supply (smps) applications. it controls the output voltage and the maximum output current of a power supply unit. it is located on the seco ndary side of the smps. the tle 4305 consists of a ou tput voltage control loop and a current control loop. the driver is especially designed to drive the opto-isolator. the current controls the pwm duty cycle of the primary regulator. isolated smps switch mode power supply (smps) syst ems generate a regulated dc voltage v q that is isolated from the primary si de. a maximum output current i qmax is defined to protect the system in any load failures. figure 3 isolated smps principle the principle of an isolated smps is shown in figure 3 . the primary side of the smps is supplied by the li ne. the secondary side supplies a regulated voltage to the load. primary and secondary side are isolated from each other by the transformer and an opto isolator. a smps controller such as the infineon tda 1683x controls the pw m duty cycle of the output voltage signal. the si gnal is transmitted by a trans former with n1:n2 (n: number of windings). on the secondary side a load capacitor is ch arged. the secondary regulator controls the output voltage v q and limits the output current. it generates an analog control signal to the primary side through an opto isolator to regulate the pwm duty cycle of the primary sig nal. the loop is closed throug h the primary smps regulator and the transformer. simple smps defines the output voltage by a voltage divider and a transistor. this requires very precise resistor values and due to the nature of the transistor the control signal is dependent on temperature and device variation. the current limitation has to be done on the primary side with elements suitable for high voltages. aes02888 smps with cool set secondary regulator with tle 4305 opto isolator line precise output voltage output current precise limited short circuit protected
tle 4305 data sheet 9 rev. 2.2, 2008-11-17 smps with tle 4305 secondary regulator the tle 4305 is located on th e secondary side of the regulator and co ntrols the output voltage as well as it limi ts the output current. voltag e and current can be chosen independent from each othe r by the designer accord ing to the application?s requirements. figure 4 application circuit v q = 2.5 v ( r v1 + r v2 ) / r v2 (1) i q = 0.2 v / r sense (2) figure 3 shows the tle 4305 as sm ps secondary regulator as application circuit. the load capacitor c l is charged by the pwm-signal at the secondary side of the transformer. the diode d2 defines the curre nt flow in the transformer. aes02878 tle 4305g c cco 10 nf cco c vco 10 nf vco cre gnd vse v s c s 100 nf d1 rgl34d n 3 n 1 cse r sense out c l 470 f d2 sms2100 n 2 smps primary side cool set tda 1683x pwm duty cycle = f( v fb ) fb optocoupler l s c s1 c s2 + - v q line r v1 r v2
data sheet 10 rev. 2.2, 2008-11-17 tle 4305 the tle 4305 includes an i ndependent voltage co ntrol and current control loop. the internal schematic is shown in figure 2 . for i q < i qmax the voltage contro l gets priority. if the supply operates in the overcurrent protection mode, th e current loop is active and reduces the output voltage wi th constant output current i qmax . the output voltage/output current curve is shown in figure 5 . both the current control loop and the volt age control loop are temperature compensated. figure 5 current and voltage limit the voltage or current loop regulator result defines the current into the opto isolator to control the pwm duty cycle. th e led driver is fully integr ated, no extern al components are required. aed02882 v q i q voltage regulator active current regulator active v q i qmax cross over
tle 4305 data sheet 11 rev. 2.2, 2008-11-17 voltage control loop figure 6 voltage loop the voltage loop regulator compares the input voltage v se to a reference voltage v ref of typical 2.5 v. the difference is attenuated and proportional current drives the opto isolator. the control loop output voltage v q , pin vse, pin out, opto isolator, primary regulator and the tran sformer close the loop. to program an output voltage a divider is used. the resist ors are chosen according to equation (5) . v vse = v ref (3) v vse = v q r v2 / ( r v1 + r v2 )(4) with v ref typical 2.5 v v q = v vse ( r v1 + r v2 ) / r v2 (5) to compensate the voltage lo op a 10 nf capaci tor should be connec ted to pin vco. with the internal 1 k ? resistor it reduces the overal l closed voltage lo op?s bandwidth. if the gain of the over all loop has to be adapted to the application?s needs, the output capacitor can be modified accordingly. aes02883 v-ota c vco 10 nf vse voltage loop tle 4305 control logic from current loop 1 k ? r vc 1 k ? out vco r v2 driver r v1 v q v ref
data sheet 12 rev. 2.2, 2008-11-17 tle 4305 current control loop figure 7 current control loop to detect the current a sense resistor r sense is placed in the cu rrent back-path to the transformer (see figure 4 and figure 7 ). the control operational amplifier compares t he voltage at pin cre to the voltage at the inverting input of the ota. in an overcurrent condition, the overall closed loop through current loop, opto isolator, pr imary regulator, transformer an d the application reduces the pwm duty cycle to meet the closed loop condition. v cse - v cre is typical 200 mv. the current limit is defined by i qmax = 200 mv / r sense (6) to compensate the overall cl osed current loop a 10 nf ca pacitor should be connected to pin vco. with the internal 1 k ? resistor it reduces the voltage loop?s bandwidth. as already explained for the vo ltage loop, the capaci tor can be modified according to the overall loop?s bandwidth. to further improve the current control in addition a compen sation can be added at pin cre as shown in figure 8 . aes02880 c-ota r i1 25 k ? c cco 10 nf v ref cse cre current loop tle 4305 control logic from voltage loop 1 k ? r cc 1 k ? out cco r i1 25 k ? r sense d2 driver
tle 4305 data sheet 13 rev. 2.2, 2008-11-17 figure 8 improved current control loop the calculation of the current is id entical to the above calculation ( equation (6) ). the voltage at resistor r cre can be neglected (typ ical 2 mv for 10 k ? resistor). the resistor r cre and the capacitor c cre improve further the curre nt control loop response. supply of the tle 4305 the tle 4305 is an active circuitry an d requires a supply voltage at pin v s . during start up of the supply, there is no energy stored in the load capacitor. dependent on the required output voltage also during operat ion the output voltag e might be too small. therefore a second transformer-winding n3 is required. the volt age charges the input capacitor c s though the diode d1. internally the tle 4305 generates for input voltages above 8 v a preregulated 6 v internal rail . the device generates biasing currents and reference voltages from this rail. to avoid ground and v q -shifts, all gnd connections sh ould be connec ted to one point as well as all v q -signals. if the application requires mo re than one voltage linear post-regulators can be used. in the application a choke should be placed in series. an elec trolyte or tantalum capacitor of 10 f to 100 f should be used in para llel to a 10 to 100 nf ce ramic capacito r to filter high frequency noise. the size of the ch oke and the capacito rs depend on the application requirements. aes02881 c-ota r i1 25 k ? c cco 10 nf v ref cse cre current loop tle 4305 control logic from voltage loop 1 k ? r cc 1 k ? out cco r i1 25 k ? r cre 10 k ? c cre 100 nf v q r sense d2 driver
data sheet 14 rev. 2.2, 2008-11-17 tle 4305 package outlines figure 9 pg-dso-8 (plastic dual small outline) green product (rohs compliant) to meet the world-wi de customer requirements for envi ronmentally friendly products and to be compliant with government regula tions the device is available as a green product. green products are ro hs-compliant (i.e pb-free fi nish on leads and suitable for pb-free soldering according to ipc/jedec j-std-020). +0.06 0.19 0.35 x 45? 1) -0.2 4 c 8 max. 0.64 0.2 6 0.25 0.2 8x m c 1.27 +0.1 0.41 0.2 m a -0.06 1.75 max. (1.45) 0.07 0.175 b 8x b 2) index marking 5 -0.2 1) 4 1 85 a 1) does not include plastic or metal protrusion of 0.15 max. per side 2) lead width can be 0.61 max. in dambar area gps01181 0.1 you can find all of our packages, sorts of packing and others in our infineon internet page ?products?: http://www.infineon.com/products . dimensions in mm smd = surface mounted device
tle 4305 data sheet 15 rev. 2.2, 2008-11-17 revision history version date changes rev. 2.2 2008-11-17 initial version of rohs-compliant derivate of tle 4305. page 4 : esd rating changed to hbm 1. 5kv with modified test condition (changed te st standard to jedec jesd22-a114 ) page 1 and page 14 : rohs compliance statement and green product feature added page 1 and page 14 : package changed to rohs compliant version legal disclaimer updated
edition 2008-11-17 published by infineon technologies ag 81726 munich, germany ? 2008 infineon technologies ag all rights reserved. legal disclaimer the information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. with respect to any examples or hints given herein, any typical valu es stated herein and/or any information regarding the application of the device, infineon technologies her eby disclaims any and all warranties and liabilities of any kind, including wi thout limitation, warranties of non-infrin gement of intellectual property rights of any third party. information for further information on technology, delivery terms an d conditions and prices, please contact the nearest infineon technologies office ( www.infineon.com ). warnings due to technical requirements, components may contain dangerous substances. for information on the types in question, please contact the near est infineon technologies office. infineon technologies components may be used in life-supp ort devices or systems only with the express written approval of infineon technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safe ty or effectiveness of that device or system. life support devices or systems are intended to be implanted in the hu man body or to support and/or maintain and sustain and/or protect human life. if they fail, it is reasonable to assume that the health of the user or other persons may be endangered.

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